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authorSven Schnelle <svens@stackframe.org>2011-06-05 11:33:41 +0200
committerSven Schnelle <svens@stackframe.org>2011-06-07 22:01:29 +0200
commitf4dc1a73e440766bbc12b738462ae9467f6030fe (patch)
tree467073c23cc2f42ebf56c9101f11c12d2a224a12 /src/southbridge/intel
parentbb60528e73ed611553befba2ea1bdf8c690a26e5 (diff)
SMM: add defines for APM_CNT register
in the current code, the defines for the APM_CNT (0xb2) register are duplicated in almost every place where it is used. define those values in cpu/x86/smm.h, and only include this file. And while at it, fixup whitespace. Change-Id: Iae712aff53322acd51e89986c2abf4c794e25484 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/4 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801dx/smihandler.c21
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c13
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c18
-rw-r--r--src/southbridge/intel/sch/smihandler.c5
4 files changed, 18 insertions, 39 deletions
diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c
index 4875ba7480..1d306da280 100644
--- a/src/southbridge/intel/i82801dx/smihandler.c
+++ b/src/southbridge/intel/i82801dx/smihandler.c
@@ -30,15 +30,6 @@
#define DEBUG_SMI
-#define APM_CNT 0xb2
-#define CST_CONTROL 0x85
-#define PST_CONTROL 0x80
-#define ACPI_DISABLE 0x1e
-#define ACPI_ENABLE 0xe1
-#define GNVS_UPDATE 0xea
-#define MBI_UPDATE 0xeb
-#define APM_STS 0xb3
-
/* I830M */
#define SMRAM 0x90
#define D_OPEN (1 << 6)
@@ -370,33 +361,33 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
reg8 = inb(APM_CNT);
switch (reg8) {
- case CST_CONTROL:
+ case APM_CNT_CST_CONTROL:
/* Calling this function seems to cause
* some kind of race condition in Linux
* and causes a kernel oops
*/
printk(BIOS_DEBUG, "C-state control\n");
break;
- case PST_CONTROL:
+ case APM_CNT_PST_CONTROL:
/* Calling this function seems to cause
* some kind of race condition in Linux
* and causes a kernel oops
*/
printk(BIOS_DEBUG, "P-state control\n");
break;
- case ACPI_DISABLE:
+ case APM_CNT_ACPI_DISABLE:
pmctrl = inl(pmbase + PM1_CNT);
pmctrl &= ~SCI_EN;
outl(pmctrl, pmbase + PM1_CNT);
printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
break;
- case ACPI_ENABLE:
+ case APM_CNT_ACPI_ENABLE:
pmctrl = inl(pmbase + PM1_CNT);
pmctrl |= SCI_EN;
outl(pmctrl, pmbase + PM1_CNT);
printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
break;
- case GNVS_UPDATE:
+ case APM_CNT_GNVS_UPDATE:
if (smm_initialized) {
printk(BIOS_DEBUG, "SMI#: SMM structures already initialized!\n");
return;
@@ -407,7 +398,7 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
smm_initialized = 1;
printk(BIOS_DEBUG, "SMI#: Setting up structures to %p, %p, %p\n", gnvs, tcg, smi1);
break;
- case MBI_UPDATE: // FIXME
+ case APM_CNT_MBI_UPDATE: // FIXME
if (mbi_initialized) {
printk(BIOS_DEBUG, "SMI#: mbi already registered!\n");
return;
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 7feb76a5fb..394f161f95 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -29,6 +29,7 @@
#include <arch/ioapic.h>
#include <cpu/cpu.h>
#include "i82801gx.h"
+#include <cpu/x86/smm.h>
#define NMI_OFF 0
@@ -341,13 +342,13 @@ static void i82801gx_lock_smm(struct device *dev)
#endif
#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(0xe1, 0xb2); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
+ printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
+ outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
+ printk(BIOS_DEBUG, "done.\n");
#else
- printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
- outb(0x1e, 0xb2); // Disable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
+ printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
+ outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
+ printk(BIOS_DEBUG, "done.\n");
#endif
/* Don't allow evil boot loaders, kernels, or
* userspace applications to deceive us:
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index bccf6d5f05..9befbf9ac1 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -28,14 +28,6 @@
#include <device/pci_def.h>
#include "i82801gx.h"
-#define APM_CNT 0xb2
-#define CST_CONTROL 0x85
-#define PST_CONTROL 0x80
-#define ACPI_DISABLE 0x1e
-#define ACPI_ENABLE 0xe1
-#define GNVS_UPDATE 0xea
-#define APM_STS 0xb3
-
/* I945 */
#define SMRAM 0x9d
#define D_OPEN (1 << 6)
@@ -366,33 +358,33 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
return;
switch (reg8) {
- case CST_CONTROL:
+ case APM_CNT_CST_CONTROL:
/* Calling this function seems to cause
* some kind of race condition in Linux
* and causes a kernel oops
*/
printk(BIOS_DEBUG, "C-state control\n");
break;
- case PST_CONTROL:
+ case APM_CNT_PST_CONTROL:
/* Calling this function seems to cause
* some kind of race condition in Linux
* and causes a kernel oops
*/
printk(BIOS_DEBUG, "P-state control\n");
break;
- case ACPI_DISABLE:
+ case APM_CNT_ACPI_DISABLE:
pmctrl = inl(pmbase + PM1_CNT);
pmctrl &= ~SCI_EN;
outl(pmctrl, pmbase + PM1_CNT);
printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
break;
- case ACPI_ENABLE:
+ case APM_CNT_ACPI_ENABLE:
pmctrl = inl(pmbase + PM1_CNT);
pmctrl |= SCI_EN;
outl(pmctrl, pmbase + PM1_CNT);
printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
break;
- case GNVS_UPDATE:
+ case APM_CNT_GNVS_UPDATE:
if (smm_initialized) {
printk(BIOS_DEBUG, "SMI#: SMM structures already initialized!\n");
return;
diff --git a/src/southbridge/intel/sch/smihandler.c b/src/southbridge/intel/sch/smihandler.c
index 127f62772a..99ae018770 100644
--- a/src/southbridge/intel/sch/smihandler.c
+++ b/src/southbridge/intel/sch/smihandler.c
@@ -28,11 +28,6 @@
#define DEBUG_SMI
-#define APM_CNT 0xb2
-#define APM_STS 0xb3
-#define ACPI_DISABLE 0x1e
-#define ACPI_ENABLE 0xe1
-
/* I945 */
#define SMRAM 0x9d
#define D_OPEN (1 << 6)