diff options
| author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-01-02 01:47:26 +0100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2016-01-03 21:22:41 +0100 |
| commit | 42d55e0caf9999be461ef5c5029d11fb8f4c5593 (patch) | |
| tree | 42d171c030224814626fb4f39ac9b5928e576b50 /src/southbridge/intel | |
| parent | 5aaeb27de97e2badba469229df9b2af9e33619e4 (diff) | |
sb/intel/bd82x6x: Add missing PCIIDs for variants .
Change-Id: I917b8167a028aa9412b0cc6dedf8f09a1d1fae7f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/12820
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 17f824c87d..1106912830 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -859,12 +859,18 @@ static struct device_operations device_ops = { * Intel C200 Series Chipset */ -static const unsigned short pci_device_ids[] = { 0x1c46, 0x1c47, 0x1c49, 0x1c4a, - 0x1c4b, 0x1c4c, 0x1c4d, 0x1c4e, - 0x1c4f, 0x1c50, 0x1c52, 0x1c54, - 0x1e55, 0x1c56, 0x1e57, 0x1c5c, - 0x1e5d, 0x1e5e, 0x1e5f, 0x1e49, - 0 }; +static const unsigned short pci_device_ids[] = { + 0x1c40, 0x1c41, 0x1c42, 0x1c43, 0x1c44, 0x1c45, 0x1c46, 0x1c47, 0x1c48, + 0x1c49, 0x1c4a, 0x1c4b, 0x1c4c, 0x1c4d, 0x1c4e, 0x1c4f, 0x1c50, 0x1c51, + 0x1c52, 0x1c53, 0x1c54, 0x1c55, 0x1c56, 0x1c57, 0x1c58, 0x1c59, 0x1c5a, + 0x1c5b, 0x1c5c, 0x1c5d, 0x1c5e, 0x1c5f, + + 0x1e41, 0x1e42, 0x1e43, 0x1e44, 0x1e45, 0x1e46, 0x1e47, 0x1e48, 0x1e49, + 0x1e4a, 0x1e4b, 0x1e4c, 0x1e4d, 0x1e4e, 0x1e4f, 0x1e50, 0x1e51, 0x1e52, + 0x1e53, 0x1e54, 0x1e55, 0x1e56, 0x1e57, 0x1e58, 0x1e59, 0x1e5a, 0x1e5b, + 0x1e5c, 0x1e5d, 0x1e5e, 0x1e5f, + + 0 }; static const struct pci_driver pch_lpc __pci_driver = { .ops = &device_ops, |