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authorAaron Durbin <adurbin@chromium.org>2019-12-27 15:16:17 -0700
committerAaron Durbin <adurbin@chromium.org>2020-01-06 15:00:50 +0000
commitd701ef7475fe6d015a61cd91410391c3e0902f53 (patch)
treea3b1aaaaa6490b62ef7c71e9a119a41bd32d825a /src/southbridge/intel
parent9e877ec60d177565776b20e3d61f723a9552ee34 (diff)
drives/spi_flash: add spi_flash_cmd_write_page_program()
The SPI flashes that support page programming mode had duplicated the logic for writing in every driver. Add spi_flash_cmd_write_page_program() and use the common implementation to reduce code size that comes from duplication. The savings is ~2.5KiB per stage where the spi flash drivers are utilized. Change-Id: Ie6db03fa8ad33789f1d07a718a769e4ca8bffe1d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
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