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| author | Nico Huber <nico.huber@secunet.com> | 2012-07-19 16:16:59 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-20 23:41:38 +0200 |
| commit | 8bacc40fc7bd07365c2992b260ddbd45cd6e4518 (patch) | |
| tree | dd0ad475f50b088c148363c2de40c751c819dbb8 /src/southbridge/intel/sch/pcie.c | |
| parent | 5869fa2e631d5d2483a4ee0445e6496120b42f02 (diff) | |
Fix udelay() implementation for i945 romstage
Work around 32-bit overflow with 64-bit multiplication. Calculate
correct CPU frequency.
Change-Id: I86d78f2d70b9f9c62fd4e1e0d765e92e4de83f67
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1254
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/sch/pcie.c')
0 files changed, 0 insertions, 0 deletions