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author | Dhaval Sharma <dhaval.v.sharma@intel.com> | 2015-11-02 17:12:10 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-12-03 14:17:48 +0100 |
commit | 590ac64d5571d8b85e0ddd65b25b8cda9354de15 (patch) | |
tree | 37518ea67f83bfeb499360202ed7ea0d3f6a30bb /src/southbridge/intel/sch/pcie.c | |
parent | 1fc5d1f01a9888f9d4b0127c87834966f933124d (diff) |
intel/fsp1_1: Add accurate print for full fsp version
Adding print for full fsp revision which includes:
0:7 - Build number
8:15 - Revision
16:23 - Minor version
24:31 - Major version
BRANCH=NONE
BUG=chrome-os-partner:46050
TEST=Built for kunimitsu and tested fsp revision is printed properly.
Change-Id: If2739e7cccd97e4b39da503a9d61222cde03bc95
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c49be46f8d2085a620abac74126de5c3b634e649
Original-Change-Id: I2223cce22fb3d39faa37902d415d5fdbe321add6
Original-Signed-off-by: Dhaval Sharma <dhaval.v.sharma@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310173
Original-Commit-Ready: dhaval v sharma <dhaval.v.sharma@intel.com>
Original-Tested-by: dhaval v sharma <dhaval.v.sharma@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12594
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/sch/pcie.c')
0 files changed, 0 insertions, 0 deletions