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authorPeter Lemenkov <lemenkov@gmail.com>2018-10-23 11:12:46 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 11:56:38 +0000
commit7b42811fa55bb5ea67c8dc71cd9436cd8ddd83c3 (patch)
tree94dd4dcd1d56127b41b37603c3ef491850b969f5 /src/southbridge/intel/lynxpoint
parentaa6d38859768486d3353edd7aef092b6318ac1bf (diff)
sb/intel: Use common RCBA MACROs
This commit follows up on commit 2e464cf3 with Change-Id I61fb3b01ff15ba2da2ee938addfa630c282c9870. Change-Id: Iaf06d347e2da5680816b17f49523ac1a687798ba Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/29236 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: David Guckian Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h21
1 files changed, 2 insertions, 19 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 2aa6b48785..026fcdd383 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -83,11 +83,8 @@
#endif
#define HPET_ADDR 0xfed00000
-#ifndef __ACPI__
-#define DEFAULT_RCBA ((u8 *)0xfed1c000)
-#else
-#define DEFAULT_RCBA 0xfed1c000
-#endif
+
+#include <southbridge/intel/common/rcba.h>
#ifndef __ACPI__
@@ -477,20 +474,6 @@ void mainboard_config_superio(void);
#define PMBASE 0x40
-/* Root Complex Register Block */
-#define RCBA 0xf0
-
-#define RCBA8(x) *((volatile u8 *)(DEFAULT_RCBA + x))
-#define RCBA16(x) *((volatile u16 *)(DEFAULT_RCBA + x))
-#define RCBA32(x) *((volatile u32 *)(DEFAULT_RCBA + x))
-
-#define RCBA_AND_OR(bits, x, and, or) \
- RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or))
-#define RCBA8_AND_OR(x, and, or) RCBA_AND_OR(8, x, and, or)
-#define RCBA16_AND_OR(x, and, or) RCBA_AND_OR(16, x, and, or)
-#define RCBA32_AND_OR(x, and, or) RCBA_AND_OR(32, x, and, or)
-#define RCBA32_OR(x, or) RCBA_AND_OR(32, x, ~0UL, or)
-
#define VCH 0x0000 /* 32bit */
#define VCAP1 0x0004 /* 32bit */
#define VCAP2 0x0008 /* 32bit */