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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-27 21:24:08 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-29 16:25:25 +0000
commit22ecdbe9f314842e6bee872756f2f17ad2f71d71 (patch)
tree04e96cd4bce60831ccd533fecdf02137e6e10dbd /src/southbridge/intel/lynxpoint
parent6271dd8459a4dc717f920ba1997db6ad510dfcb7 (diff)
soc/intel: Drop CMEM from GNVS
Already tagged as obsolete_cmem in <soc/nvs.h> files. Change-Id: I8ba2a79f866fa07f1b4ae7291c72c91db5027911 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50043 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index f4071f1144..979e084161 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -59,7 +59,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
S3U0, 8, // 0x35 - Enable USB0 in S3
S3U1, 8, // 0x36 - Enable USB1 in S3
S33G, 8, // 0x37 - Enable 3G in S3
- CMEM, 32, // 0x38 - CBMEM TOC
+ , 32, // 0x38 - CBMEM TOC
/* Integrated Graphics Device */
Offset (0x3c),
IGDS, 8, // 0x3c - IGD state (primary = 1)