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authorElyes HAOUAS <ehaouas@noos.fr>2020-02-16 10:01:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-24 14:10:00 +0000
commit2119d0ba4345a19b9db7dc13e36f3fa57f75d234 (patch)
treeaeeef324906730e350c338edb4f5704f20a95385 /src/southbridge/intel/lynxpoint
parentebdf298ec2dd84810a37a4aac154200b2102b394 (diff)
treewide: Capitalize 'CMOS'
Change-Id: I1d36e554618498d70f33f6c425b0abc91d4fb952 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38928 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Peter Lemenkov <lemenkov@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index ba9f850208..fddfa701af 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -133,8 +133,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
Offset (0xb4),
ASLB, 32, // 0xb4 - IGD OpRegion Base Address
IBTT, 8, // 0xb8 - IGD boot panel device
- IPAT, 8, // 0xb9 - IGD panel type cmos option
- ITVF, 8, // 0xba - IGD TV format cmos option
+ IPAT, 8, // 0xb9 - IGD panel type CMOS option
+ ITVF, 8, // 0xba - IGD TV format CMOS option
ITVM, 8, // 0xbb - IGD TV minor format option
IPSC, 8, // 0xbc - IGD panel scaling
IBLC, 8, // 0xbd - IGD BLC config