lynxpoint: Rework ACPI NVS to add new SerialIO variables

This reclaims space in ACPI NVS by removing unused fields and
adds new fields for SerialIO BARs which will be used to communicate
the allocated resources to ACPI.

Change-Id: I002bf396cf7b495bc5b7e54b741527e507aff716
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2969
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2 files changed, 31 insertions, 59 deletions

diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 2fe092d952..8f6c8257c1 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -106,36 +106,31 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
 	DID3,	32,	// 0x4f - Device ID 3
 	DID4,	32,	// 0x53 - Device ID 4
 	DID5,	32,	// 0x57 - Device ID 5
-	/* Backlight Control */
-	Offset (0x64),
-	BLCS,	 8,	// 0x64 - Backlight control possible?
-	BRTL,	 8,	// 0x65 - Brightness Level
-	ODDS,	 8,	// 0x66
-	/* Ambient Light Sensors */
-	Offset (0x6e),
-	ALSE,	 8,	// 0x6e - ALS enable
-	ALAF,	 8,	// 0x6f - Ambient light adjustment factor
-	LLOW,	 8,	// 0x70 - LUX Low
-	LHIH,	 8,	// 0x71 - LUX High
-	/* EMA */
-	Offset (0x78),
-	EMAE,	 8,	// 0x78 - EMA enable
-	EMAP,	16,	// 0x79 - EMA pointer
-	EMAL,	16,	// 0x7b - EMA length
-	/* MEF */
-	Offset (0x82),
-	MEFE,	 8,	// 0x82 - MEF enable
+
 	/* TPM support */
-	Offset (0x8c),
-	TPMP,	 8,	// 0x8c - TPM
-	TPME,	 8,	// 0x8d - TPM enable
-	/* SATA */
-	Offset (0x96),
-	GTF0,	56,	// 0x96 - GTF task file buffer for port 0
-	GTF1,	56,	// 0x9d - GTF task file buffer for port 1
-	GTF2,	56,	// 0xa4 - GTF task file buffer for port 2
-	IDEM,	 8,	// 0xab - IDE mode (compatible / enhanced)
-	IDET,	 8,	// 0xac - IDE
+	Offset (0x5b),
+	TPMP,	 8,	// 0x5b - TPM Present
+	TPME,	 8,	// 0x5c - TPM Enable
+
+	/* LynxPoint Serial IO device BARs */
+	Offset (0x60),
+	S0B0,	32,	// 0x60 - D21:F0 Serial IO SDMA BAR0
+	S1B0,	32,	// 0x64 - D21:F1 Serial IO I2C0 BAR0
+	S2B0,	32,	// 0x68 - D21:F2 Serial IO I2C1 BAR0
+	S3B0,	32,	// 0x6c - D21:F3 Serial IO SPI0 BAR0
+	S4B0,	32,	// 0x70 - D21:F4 Serial IO SPI1 BAR0
+	S5B0,	32,	// 0x74 - D21:F5 Serial IO UAR0 BAR0
+	S6B0,	32,	// 0x78 - D21:F6 Serial IO UAR1 BAR0
+	S7B0,	32,	// 0x7c - D23:F0 Serial IO SDIO BAR0
+	S0B1,	32,	// 0x80 - D21:F0 Serial IO SDMA BAR1
+	S1B1,	32,	// 0x84 - D21:F1 Serial IO I2C0 BAR1
+	S2B1,	32,	// 0x88 - D21:F2 Serial IO I2C1 BAR1
+	S3B1,	32,	// 0x8c - D21:F3 Serial IO SPI0 BAR1
+	S4B1,	32,	// 0x90 - D21:F4 Serial IO SPI1 BAR1
+	S5B1,	32,	// 0x94 - D21:F5 Serial IO UAR0 BAR1
+	S6B1,	32,	// 0x98 - D21:F6 Serial IO UAR1 BAR1
+	S7B1,	32,	// 0x9c - D23:F0 Serial IO SDIO BAR1
+
 	/* IGD OpRegion */
 	Offset (0xb4),
 	ASLB,	32,	// 0xb4 - IGD OpRegion Base Address
diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h
index b8506d4db4..3df1da1f20 100644
--- a/src/southbridge/intel/lynxpoint/nvs.h
+++ b/src/southbridge/intel/lynxpoint/nvs.h
@@ -83,37 +83,14 @@ typedef struct {
 	u16	sste; /* 0x44 - set display state */
 	u8	ndid; /* 0x46 - number of device ids */
 	u32	did[5]; /* 0x47 - 5b device id 1..5 */
-	u8	rsvd5[0x9];
-	/* Backlight Control */
-	u8	blcs; /* 0x64 - Backlight Control possible */
-	u8	brtl;
-	u8	odds;
-	u8	rsvd6[0x7];
-	/* Ambient Light Sensors*/
-	u8	alse; /* 0x6e - ALS enable */
-	u8	alaf;
-	u8	llow;
-	u8	lhih;
-	u8	rsvd7[0x6];
-	/* Extended Mobile Access */
-	u8	emae; /* 0x78 - EMA enable */
-	u16	emap; /* 0x79 - EMA pointer */
-	u16	emal; /* 0x7a - EMA Length */
-	u8	rsvd8[0x5];
-	/* MEF */
-	u8	mefe; /* 0x82 - MEF enable */
-	u8	rsvd9[0x9];
 	/* TPM support */
-	u8	tpmp; /* 0x8c - TPM */
-	u8	tpme;
-	u8	rsvd10[8];
-	/* SATA */
-	u8	gtf0[7]; /* 0x96 - GTF task file buffer for port 0 */
-	u8	gtf1[7];
-	u8	gtf2[7];
-	u8	idem;
-	u8	idet;
-	u8	rsvd11[7];
+	u8	tpmp; /* 0x5b - TPM Present */
+	u8	tpme; /* 0x5c - TPM Enable */
+	u8	rsvd5[3];
+	/* LynxPoint Serial IO device BARs */
+	u32	s0b[8]; /* 0x60 - 0x7f - BAR0 */
+	u32	s1b[8]; /* 0x80 - 0x9f - BAR1 */
+	u8	rsvd6[20];
 	/* IGD OpRegion (not implemented yet) */
 	u32	aslb; /* 0xb4 - IGD OpRegion Base Address */
 	u8	ibtt; /* 0xb8 - IGD boot type */