summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-03-21 11:10:03 +0100
committerNico Huber <nico.h@gmx.de>2019-04-06 16:09:12 +0000
commitbf0970e762a6611cef06af761bc2dec068d439bb (patch)
tree44d4854b7027794bc5a76b44a4e8fd07935cd60c /src/southbridge/intel/lynxpoint
parent161eafb0fb9563decbb953d5dccac4762b770e0c (diff)
src: Use include <delay.h> when appropriate
Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: David Guckian
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c2
-rw-r--r--src/southbridge/intel/lynxpoint/smihandler.c4
2 files changed, 2 insertions, 4 deletions
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index 2deb92976e..cb1c190b39 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -21,8 +21,8 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/mmio.h>
-#include <delay.h>
#include <device/azalia_device.h>
+
#include "pch.h"
#include "hda_verb.h"
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index bfa112a807..88c599f782 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <delay.h>
#include <types.h>
#include <arch/io.h>
#include <device/pci_ops.h>
@@ -29,12 +28,11 @@
#include <southbridge/intel/common/finalize.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>
+
#include "me.h"
#include "pch.h"
-
#include "nvs.h"
-
static u8 smm_initialized = 0;
/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located