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authorAngel Pons <th3fanbus@gmail.com>2020-11-05 01:58:34 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-10 10:08:45 +0000
commitae999503f62ef8a3b9b2756a2810d29c383a009e (patch)
tree4fa5e9cd6074c905f57f1695af362da5f18b012c /src/southbridge/intel/lynxpoint
parent517750745f7fa4c29771c8fc0e03aa1449e44518 (diff)
nb/intel/haswell/pcie.c: Add missing pre-ASPM init
Add devicetree configuration parameters for mainboard-specific settings, and provide reasonable defaults, which should usually be good enough. This is based on Haswell SA Reference Code version 1.9.0 (Nov 2014). Tested on Asrock B85M Pro4, registers now have the expected values. Change-Id: I0dcdd4ca431c2ae1e62f2719c376d8bdef3054bd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47223 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
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