diff options
| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:53:22 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:07:08 +0000 |
| commit | 26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch) | |
| tree | 8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/southbridge/intel/lynxpoint | |
| parent | 50863daef8ed75c0cb3dfd375e7622c898de5821 (diff) | |
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/me_status.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index f3c08d885f..d0eb4b33f0 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -25,7 +25,7 @@ #define NMI_OFF 0 /** - * Set miscellanous static southbridge features. + * Set miscellaneous static southbridge features. * * @param dev PCI device with I/O APIC control registers */ diff --git a/src/southbridge/intel/lynxpoint/me_status.c b/src/southbridge/intel/lynxpoint/me_status.c index 82a8f8ed0a..fb4490f867 100644 --- a/src/southbridge/intel/lynxpoint/me_status.c +++ b/src/southbridge/intel/lynxpoint/me_status.c @@ -187,7 +187,7 @@ void intel_me_status(struct me_hfs *hfs, struct me_hfs2 *hfs2) break; default: - printk(BIOS_DEBUG, "Unknown phase: 0x%02x sate: 0x%02x", + printk(BIOS_DEBUG, "Unknown phase: 0x%02x state: 0x%02x", hfs2->progress_code, hfs2->current_state); } printk(BIOS_DEBUG, "\n"); diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 598c2dc7b2..7d9fc6d6af 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -647,7 +647,7 @@ void mainboard_config_rcba(void); #define SPIBAR16(x) RCBA16((x) + SPIBAR_OFFSET) #define SPIBAR32(x) RCBA32((x) + SPIBAR_OFFSET) -/* Reigsters within the SPIBAR */ +/* Registers within the SPIBAR */ #define SSFC 0x91 #define FDOC 0xb0 #define FDOD 0xb4 |