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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-05-17 11:02:06 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-23 12:14:41 +0000 |
| commit | ea66f8280b5378fe70beb0dfdf84a040aa2dda0b (patch) | |
| tree | bec673e0cea5f396f39005e46ff5c3b3190e5d1d /src/southbridge/intel/lynxpoint/uart.c | |
| parent | b2d9d57103a13f89538df41dc4e8fe9dcdb8a967 (diff) | |
drivers/crb: Generate TPM PPI ACPI code
The TPM PPI code was only generated for memory mapped non-CRB TPMs.
There is no reason why CRB TPM should not have the PPI, e.g. PTT.
Call the relevant method to add the PPI to SSDT.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I3d3f08ea686c95ef75ae8fe7a5dcf16f7492ce68
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64422
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/uart.c')
0 files changed, 0 insertions, 0 deletions