diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-06-08 00:12:43 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-07 11:02:43 +0000 |
commit | bf9bc50ec1d1b54a9ae0b86fc1e37e013422186f (patch) | |
tree | 71761d671564698f5386bceb501404a16924b380 /src/southbridge/intel/lynxpoint/smbus.c | |
parent | bd84485017a460fa23758770c547de2a859e2dff (diff) |
sb/intel/lynxpoint: Use PCI bitwise ops
Some cases could not be factored out while keeping reproducibility.
Also mark some potential bugs with a FIXME comment, since fixing them
while also keeping the binary unchanged is pretty much impossible.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 does not change.
Change-Id: I27d6aaa59e12a337f80a6d3387cc9c8ae5949384
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42154
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/smbus.c')
-rw-r--r-- | src/southbridge/intel/lynxpoint/smbus.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index 22bf75a4e4..8498a6cdb1 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -15,6 +15,7 @@ static void pch_smbus_init(struct device *dev) u16 reg16; /* Enable clock gating */ + /* FIXME: Using 32-bit ops with a 16-bit variable is a bug! These should be 16-bit! */ reg16 = pci_read_config32(dev, 0x80); reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); pci_write_config32(dev, 0x80, reg16); |