diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-04-17 10:16:52 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-20 06:25:50 +0000 |
| commit | da38715ec3cef00ffa893a2adbee30674bf5f9a4 (patch) | |
| tree | 8fb26f5a187a876ce182dd3d03bef09873896dbb /src/southbridge/intel/lynxpoint/pcie.c | |
| parent | 816c5cb9fc431a46368e7b8f3596d92653a831e0 (diff) | |
mb/google/dedede: Read DRAM population strap
Configure DRAM population strap GPIO according to the schematics.
Configure an internal pull-up to support the boards in which the strap
is not populated. Read the strap and pass that information to FSP for
memory initialization.
BUG=b:152275658, b:154301008
TEST=Build and boot the mainboard. Ensure that the strap information is
read as expected and passed to FSP.
Change-Id: I69583f35ffc219bae9ce06bd4ba9898ed0d4d21d
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39812
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pcie.c')
0 files changed, 0 insertions, 0 deletions