summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/pcie.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-07-06 06:20:31 +0300
committerMartin L Roth <gaumless@gmail.com>2024-10-14 15:25:57 +0000
commit71c8dac9ca9915b7f954c33e128b022f0381dd10 (patch)
tree492d917f14ceb1ec34bd0a30f497038eb09d10a1 /src/southbridge/intel/lynxpoint/pcie.c
parent910f706bbd9aa50fbd168de4ba197547ab00a0dc (diff)
drivers/pc80/tpm: Fix tis_readresponse()
TPM_RDRESP_NEED_DELAY was introduced in 2018 in CB:25322 after observing errors with SLB9635 by Infineon. It has been confirmed also SLB9670 and SLB9672 require a fix or delay here. Presumably, prior to CB:4388 SLB9635 did not have this problem, as this particular TPM shipped with samsung/lumpy Chromebook since 2011. In CB:4388 the code changed from polling the status register (+burst_count) using a 32bit read to separated 8bit reads. So far, experiments on samsung/lumpy and SLB9635 indicate that it would be sufficient to add a single tpm_read_status() call to see TIS_STS_DATA_AVAILABLE as set at the time of evaluating the loop exit condition. Change-Id: If5c3e93c7946ebf8226f7bba47b38253f6920c61 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Co-authored-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76315 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pcie.c')
0 files changed, 0 insertions, 0 deletions