diff options
author | Felix Singer <felixsinger@posteo.net> | 2020-11-20 12:56:44 +0000 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-24 18:37:58 +0000 |
commit | 4ea08f9f5668cec116478a2fc226945c0a66259a (patch) | |
tree | 7dc777ed8e00fbf3e1c641f4e39865485135b74e /src/southbridge/intel/lynxpoint/pcie.c | |
parent | d5f1c088164d03a501fb94217bca94ffd382079e (diff) |
sb/intel/lynxpoint: Replace hard-coded IDs with defines
Replace hard-coded IDs with defines introduced in CB:47807.
Used documents:
- 328904-003
- 329003-003
Built lenovo/t440p with BUILD_TIMELESS=1, coreboot.rom remains
identical.
Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47808
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pcie.c')
-rw-r--r-- | src/southbridge/intel/lynxpoint/pcie.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 19eb9fa396..5f21e619a5 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -749,10 +749,20 @@ static struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - /* Lynxpoint Mobile */ - 0x8c10, 0x8c12, 0x8c14, 0x8c16, 0x8c18, 0x8c1a, 0x8c1c, 0x8c1e, - /* Lynxpoint Low Power */ - 0x9c10, 0x9c12, 0x9c14, 0x9c16, 0x9c18, 0x9c1a, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP1, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP2, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP3, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP4, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP5, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP6, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP7, + PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP8, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP1, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP2, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP3, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP4, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP5, + PCI_DEVICE_ID_INTEL_LPT_LP_PCIE_RP6, 0 }; |