diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 01:06:23 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-14 16:04:56 +0000 |
| commit | 30392ae396ad46adbcb0ff187579473f780cbe1e (patch) | |
| tree | 224a050dae81537563f62bdaf1b68812e6b06e33 /src/southbridge/intel/lynxpoint/pch.h | |
| parent | 20cf396c960dcf32e321cc61e31db36e78afaa55 (diff) | |
sb/intel/lynxpoint: Define SerialIO devfns
This reduces differences with Broadwell.
Tested with BUILD_TIMELESS=1, Google Panther remains identical.
Change-Id: I81c34fd03a176d0575f2fbd254052d90f2b38487
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43367
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 896454fc08..db3d92af26 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -143,6 +143,17 @@ void mainboard_config_rcba(void); #define PCH_PCS 0x84 #define PCH_PCS_PS_D3HOT 3 +/* SerialIO */ +#define PCH_DEVFN_SDMA PCI_DEVFN(0x15, 0) +#define PCH_DEVFN_I2C0 PCI_DEVFN(0x15, 1) +#define PCH_DEVFN_I2C1 PCI_DEVFN(0x15, 2) +#define PCH_DEVFN_SPI0 PCI_DEVFN(0x15, 3) +#define PCH_DEVFN_SPI1 PCI_DEVFN(0x15, 4) +#define PCH_DEVFN_UART0 PCI_DEVFN(0x15, 5) +#define PCH_DEVFN_UART1 PCI_DEVFN(0x15, 6) + +#define PCH_DEVFN_SDIO PCI_DEVFN(0x17, 0) + #define PCH_EHCI1_DEV PCI_DEV(0, 0x1d, 0) #define PCH_EHCI2_DEV PCI_DEV(0, 0x1a, 0) #define PCH_XHCI_DEV PCI_DEV(0, 0x14, 0) |