diff options
author | Tristan Corrick <tristan@corrick.kiwi> | 2018-10-31 02:26:19 +1300 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-11-01 22:22:43 +0000 |
commit | 655ef61937ccd65c19e8ddeb3da1dd40c8238cf7 (patch) | |
tree | b96ea2986cc159b4d6c9bfda5c12ee6b3aef872c /src/southbridge/intel/lynxpoint/pch.h | |
parent | f3127d4af71715bfa9e656b1187a3ba544ac8780 (diff) |
sb/intel/lynxpoint: Provide a function for mainboard super I/O config
The super I/O setup needs to be done after the LPC is enabled. For
Lynx Point, configuring the super I/O in `mainboard_romstage_entry()`
is too early to get a serial console output. To remedy this, add a
function `mainboard_config_superio()` that will be called at the
appropriate time, and can be overridden by mainboard code.
Change-Id: Iaf4188a17533c636e7b0c7efa220bc6a25876dda
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
-rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 489b565aef..1e59479561 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -206,6 +206,7 @@ int early_spi_read(u32 offset, u32 size, u8 *buffer); int early_pch_init(const void *gpio_map, const struct rcba_config_instruction *rcba_config); void pch_enable_lpc(void); +void mainboard_config_superio(void); #endif /* !__PRE_RAM__ && !__SMM__ */ #endif /* __ASSEMBLER__ */ |