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authorPatrick Rudolph <siro@das-labor.org>2016-02-06 18:07:59 +0100
committerMartin Roth <martinroth@google.com>2016-02-23 00:28:06 +0100
commit273a8dca1f7896c73b812ecc2c6cd2572ac51d6a (patch)
treea086a9e33bcef9c6490c6cc706a5aef79651f3b5 /src/southbridge/intel/lynxpoint/pch.h
parent9a4881a783fa1edc730dc484bb2c293d92e45823 (diff)
southbridge/intel/lynxpoint: Use common gpio.c
Use shared gpio code from common folder, except for INTEL_LYNXPOINT_LP, which has it's own gpio code. Needs test on real hardware ! Change-Id: Iccc6d254bafb927b6470704cec7c9dd7528e2c68 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/13615 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 46c3f635e7..2b834ff439 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -167,21 +167,6 @@ void enable_all_gpe(u32 set1, u32 set2, u32 set3, u32 set4);
void disable_all_gpe(void);
void enable_gpe(u32 mask);
void disable_gpe(u32 mask);
-/*
- * get GPIO pin value
- */
-int get_gpio(int gpio_num);
-/*
- * Get a number comprised of multiple GPIO values. gpio_num_array points to
- * the array of gpio pin numbers to scan, terminated by -1.
- */
-unsigned get_gpios(const int *gpio_num_array);
-/*
- * Set GPIO pin value.
- */
-void set_gpio(int gpio_num, int value);
-/* Return non-zero if gpio is set to native function. 0 otherwise. */
-int gpio_is_native(int gpio_num);
#if !defined(__PRE_RAM__) && !defined(__SMM__)
#include <device/device.h>