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authorAngel Pons <th3fanbus@gmail.com>2020-07-03 13:51:15 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 16:25:43 +0000
commit03f0e43a3c4172941f2eadf30f89413632b90cb4 (patch)
tree8f625362a7b465c8f9e77c22333c0c3b3c181bb8 /src/southbridge/intel/lynxpoint/pch.h
parentf0b5e91b1b76c6034750cfdd45f149cba12aab5e (diff)
haswell: Drop GPIO indirection layers
This simplifies things and makes type checking possible. Change-Id: Iefc9baabae286aac2f2c46853adf1f6edf01586f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 7987486673..c59878e48e 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -121,7 +121,7 @@ void acpi_create_intel_hpet(acpi_hpet_t * hpet);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void enable_usb_bar(void);
-int early_pch_init(const void *gpio_map);
+int early_pch_init(void);
void pch_enable_lpc(void);
void mainboard_config_superio(void);
void mainboard_config_rcba(void);