aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/pch.h
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-07-03 13:05:10 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 16:23:16 +0000
commit6e1c471f701b8ba1e9c07a87ecc73c8d855478dd (patch)
treed0dad464e0d99f807bb7e0f183f76170fbd3f02c /src/southbridge/intel/lynxpoint/pch.h
parent2cb3cc52380818c8301a7cd6f9a1295147d01186 (diff)
haswell: Turn RCBA configuration into a function
Instead of passing around a pointer to an array, just write the relevant registers directly. Note that intel/baskingridge used spaces to indent line continuations and had to be replaced with tabs to quell Jenkins. Change-Id: Ifa06a2ab24da9b8c6aac6480542fa32d04f6d6fe Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 093ebfaf7e..77377c43c7 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -161,10 +161,10 @@ void acpi_create_intel_hpet(acpi_hpet_t * hpet);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void enable_usb_bar(void);
-int early_pch_init(const void *gpio_map,
- const struct rcba_config_instruction *rcba_config);
+int early_pch_init(const void *gpio_map);
void pch_enable_lpc(void);
void mainboard_config_superio(void);
+void mainboard_config_rcba(void);
#define MAINBOARD_POWER_OFF 0
#define MAINBOARD_POWER_ON 1