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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-31 13:20:27 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-09 06:37:13 +0100
commitcce6c1c92ae521bd0f661af2ad30a7cada8fa949 (patch)
treeadedcdc58f23f3aa5271b5690b5982959dd4f2c6 /src/southbridge/intel/lynxpoint/pch.c
parent5d8b0a9fb31ff5d595aab08165ce686dd1a65dfc (diff)
cpu/allwinner/a10: Add low-level helpers for DRAM clock control
PLL5 is special in that it controls the DRAM clock, and requires a fine-grained low-level control which will be needed by raminit code. This change also brings functionality which will be needed by raminit. Change-Id: I25ecc91aa2154e504ceebb9003a5e5728d47f4a3 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4593 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.c')
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