ACPI: Select ACPI_SOC_NVS only where suitable

Having some symmetry with <soc/nvs.h> now allows to reduce
the amount of gluelogic to determine the size and cbmc field
of struct global_nvs.

Since GNVS creation is now controlled by ACPI_SOC_NVS,
drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne
cannot have this selected until <soc/nvs.h> exists.

Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lance Zhao

1 files changed, 1 insertions, 16 deletions

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index a561f55776..4868441aaf 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -16,12 +16,12 @@
 #include <string.h>
 #include "chip.h"
 #include "iobp.h"
-#include "nvs.h"
 #include "pch.h"
 #include <acpi/acpigen.h>
 #include <southbridge/intel/common/acpi_pirq_gen.h>
 #include <southbridge/intel/common/rtc.h>
 #include <southbridge/intel/common/spi.h>
+#include <soc/nvs.h>
 
 #define NMI_OFF	0
 
@@ -679,21 +679,6 @@ static void pch_lpc_enable(struct device *dev)
 	pch_enable(dev);
 }
 
-size_t gnvs_size_of_array(void)
-{
-	return sizeof(struct global_nvs);
-}
-
-uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs)
-{
-	return &gnvs->cbmc;
-}
-
-void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
-{
-	return &gnvs->chromeos;
-}
-
 void soc_fill_gnvs(struct global_nvs *gnvs)
 {
 	gnvs->apic = 1;