diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 14:59:27 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:20 +0000 |
| commit | cfe7ad1e8f7ed6f3d72db2041bf2051ac88e2a5f (patch) | |
| tree | 4440a1f19698ac7b86aa16b129c0ead05ddfdd7a /src/southbridge/intel/lynxpoint/lpc.c | |
| parent | b19e33f05ca43a40babe4f081bf6fb0ff53f5d4f (diff) | |
southbridge/intel/lynxpoint: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: I368c31b9935c0fa9e8a1be416435dd76f44ec1ec
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lpc.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index b43ca329b6..a5c2351323 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -284,18 +284,14 @@ static void pch_power_options(device_t dev) static void pch_rtc_init(struct device *dev) { - u8 reg8; - int rtc_failed; + int rtc_failed = rtc_failure(); - reg8 = pci_read_config8(dev, GEN_PMCON_3); - rtc_failed = reg8 & RTC_BATTERY_DEAD; if (rtc_failed) { - reg8 &= ~RTC_BATTERY_DEAD; - pci_write_config8(dev, GEN_PMCON_3, reg8); -#if IS_ENABLED(CONFIG_ELOG) - elog_add_event(ELOG_TYPE_RTC_RESET); -#endif + if (IS_ENABLED(CONFIG_ELOG)) + elog_add_event(ELOG_TYPE_RTC_RESET); + pci_update_config8(dev, GEN_PMCON_3, ~RTC_BATTERY_DEAD, 0); } + printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); cmos_init(rtc_failed); |