diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-04 00:38:28 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-07 14:18:35 +0000 |
| commit | f47117134d0b19914eb266af2f4f8094ca7621e6 (patch) | |
| tree | 00a08d32f37c6b2a7bd58d375268396646c46a0c /src/southbridge/intel/lynxpoint/lpc.c | |
| parent | 4b519f7c62d55b06c1d99ee6b39a0226475777ad (diff) | |
sb/intel: Don't set ACPI_EN twice
It is already done once when enabling PMBASE in early init.
Change-Id: I14289c9164ee1488c192fce721d86c89fa5cc736
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lpc.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 2872a0b556..2db4b59006 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -41,9 +41,6 @@ static void pch_enable_ioapic(struct device *dev) pci_write_config16(dev, LPC_IBDF, PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3); - /* Enable ACPI I/O range decode */ - pci_write_config8(dev, ACPI_CNTL, ACPI_EN); - set_ioapic_id(VIO_APIC_VADDR, 0x02); /* affirm full set of redirection table entries ("write once") */ |