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authorDuncan Laurie <dlaurie@chromium.org>2013-03-08 16:01:44 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-03-21 23:08:21 +0100
commit55cdf5519074ebaf972edff488be7f1340436ca1 (patch)
tree8043be07016235901e0ccd00d0a30c8e8bb29ab5 /src/southbridge/intel/lynxpoint/lp_gpio.h
parent1ad5564dd675a246f5b0a05d03482836d49d44a9 (diff)
lynxpoint: Add power management helper functions
There are subtle yet significant differences in some of the registers in the power management region between LynxPoint-H and LynxPoint-LP. In order to reduce code that is accessing these registers and would need special cases this adds a number of helper functions that can be used in both ramstage and SMM. This commit just adds the new functions, subsequent commits will start to use them. Change-Id: I411da75da519f5b3198a408078cbf3114e426992 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2813 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lp_gpio.h')
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h
index 067b6e2060..9666adc6e4 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.h
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.h
@@ -28,8 +28,6 @@
#define GPIO_SER_BLINK_CS 0x20
#define GPIO_SER_BLINK_DATA 0x24
#define GPIO_ROUTE(set) (0x30 + ((set) * 4))
-#define GPIO_ALT_GPI_SMI_STS 0x50
-#define GPIO_ALT_GPI_SMI_EN 0x54
#define GPIO_RESET(set) (0x60 + ((set) * 4))
#define GPIO_GLOBAL_CONFIG 0x7c
#define GPIO_IRQ_IS(set) (0x80 + ((set) * 4))