diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-07-30 15:58:18 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 23:54:51 +0100 |
| commit | 0dcb577652026dea116b87b0c3dd0fb16ec0aed3 (patch) | |
| tree | 57f8e79a70bf01979a265e97a1bfe70f304082be /src/southbridge/intel/lynxpoint/lp_gpio.c | |
| parent | 911cedff97c45f0794f014ceb16a83edafd028c0 (diff) | |
lynxpoint: Fix issues with XHCI init
- Put the device into D0 and not D3 so memory bar is available
and the subsequent commands actually do something useful
- Remove set of 818Ch[7:0]=FFh (gone in ref code)
- Fix reg 0x40/0x44 mixup
Verify that expected bits are set:
localhost ~ # pci_read32 0 0x14 0 0x10
0xe0500004
localhost ~ # mmio_read32 0xe0508144
0x000003ff
localhost ~ # mmio_read32 0xe050816c
0x000f0038
Change-Id: I388398e8c7d11e538ca18dab55d8bbd9b88f17df
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63801
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4408
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lp_gpio.c')
0 files changed, 0 insertions, 0 deletions