summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/include
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-12-29 05:12:56 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-20 09:22:59 +0000
commitc196246f75ae8fd235055250593fc7a78f5f3888 (patch)
treebbb1cfa12daf81da3798d27649123ae80369a142 /src/southbridge/intel/lynxpoint/include
parente1383d39d794278b6e88b1658c620ad016bef05d (diff)
ACPI GNVS: Drop most dev_count_cpu()
Only amd/picasso and amd/stoneyridge have reference to PCNT and that could be replaced with acpigen. Remove the PCNT name from GNVS OperationRegion elsewhere. Change-Id: I7dd45a840b3585fd24c31fd923b991c34ab4d783 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/include')
-rw-r--r--src/southbridge/intel/lynxpoint/include/soc/nvs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h
index aa35ea05a5..8027fe4b98 100644
--- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h
+++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h
@@ -49,7 +49,7 @@ struct __packed global_nvs {
u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */
u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */
u8 ppcm; /* 0x2c - Max. PPC state */
- u8 pcnt; /* 0x2d - Processor Count */
+ u8 unused_was_pcnt; /* 0x2d - Processor Count */
u8 rsvd4[4];
/* Super I/O & CMOS config */
u8 natp; /* 0x32 - SIO type */