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authorDuncan Laurie <dlaurie@chromium.org>2012-12-17 11:29:10 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-14 18:24:32 +0100
commit045f153a4fe2b6e1cb193db01866218d0316f253 (patch)
tree653af6488dfe46d3b8d15d3df74740632b2b3cc5 /src/southbridge/intel/lynxpoint/gpio.h
parent51254049b91a816c53b5cadf72d254f11e882818 (diff)
lynxpoint: Add new GPIO interface for Lynxpoint-LP
The low power variant of the chipset introduces a completely new interface to the GPIOs. This is a 1KB region and so needs to be moved as well so it does not conflict with other IO regions. Also expose the gpio_get functions to ramstage and move the prototypes to pch.h so they can be used for both GPIO interfaces. Change-Id: I20bc18669525af16de8cdf99f0ccfa9612be63ad Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2648 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/gpio.h')
-rw-r--r--src/southbridge/intel/lynxpoint/gpio.h24
1 files changed, 16 insertions, 8 deletions
diff --git a/src/southbridge/intel/lynxpoint/gpio.h b/src/southbridge/intel/lynxpoint/gpio.h
index a6f99f681d..20e2eea0af 100644
--- a/src/southbridge/intel/lynxpoint/gpio.h
+++ b/src/southbridge/intel/lynxpoint/gpio.h
@@ -20,6 +20,22 @@
#ifndef INTEL_LYNXPOINT_GPIO_H
#define INTEL_LYNXPOINT_GPIO_H
+/* ICH7 GPIOBASE */
+#define GPIO_USE_SEL 0x00
+#define GP_IO_SEL 0x04
+#define GP_LVL 0x0c
+#define GPO_BLINK 0x18
+#define GPI_INV 0x2c
+#define GPIO_USE_SEL2 0x30
+#define GP_IO_SEL2 0x34
+#define GP_LVL2 0x38
+#define GPIO_USE_SEL3 0x40
+#define GP_IO_SEL3 0x44
+#define GP_LVL3 0x48
+#define GP_RST_SEL1 0x60
+#define GP_RST_SEL2 0x64
+#define GP_RST_SEL3 0x68
+
#define GPIO_MODE_NATIVE 0
#define GPIO_MODE_GPIO 1
#define GPIO_MODE_NONE 1
@@ -150,12 +166,4 @@ struct pch_gpio_map {
/* Configure GPIOs with mainboard provided settings */
void setup_pch_gpios(const struct pch_gpio_map *gpio);
-/* get GPIO pin value */
-int get_gpio(int gpio_num);
-/*
- * get a number comprised of multiple GPIO values. gpio_num_array points to
- * the array of gpio pin numbers to scan, terminated by -1.
- */
-unsigned get_gpios(const int *gpio_num_array);
-
#endif