diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-12-17 11:29:10 -0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-14 18:24:32 +0100 |
| commit | 045f153a4fe2b6e1cb193db01866218d0316f253 (patch) | |
| tree | 653af6488dfe46d3b8d15d3df74740632b2b3cc5 /src/southbridge/intel/lynxpoint/gpio.c | |
| parent | 51254049b91a816c53b5cadf72d254f11e882818 (diff) | |
lynxpoint: Add new GPIO interface for Lynxpoint-LP
The low power variant of the chipset introduces a completely
new interface to the GPIOs.
This is a 1KB region and so needs to be moved as well so it does
not conflict with other IO regions.
Also expose the gpio_get functions to ramstage and move the
prototypes to pch.h so they can be used for both GPIO interfaces.
Change-Id: I20bc18669525af16de8cdf99f0ccfa9612be63ad
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2648
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/gpio.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/gpio.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/gpio.c b/src/southbridge/intel/lynxpoint/gpio.c index 25eda9a74c..9d36887dd1 100644 --- a/src/southbridge/intel/lynxpoint/gpio.c +++ b/src/southbridge/intel/lynxpoint/gpio.c @@ -20,16 +20,32 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> + +#ifdef __PRE_RAM__ #include <arch/romcc_io.h> +#else +#include <device/device.h> +#include <device/pci.h> +#endif #include "pch.h" #include "gpio.h" #define MAX_GPIO_NUMBER 75 /* zero based */ +static u16 get_gpio_base(void) +{ +#ifdef __PRE_RAM__ + return pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; +#else + return pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), + GPIO_BASE) & 0xfffc; +#endif +} + void setup_pch_gpios(const struct pch_gpio_map *gpio) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; + u16 gpiobase = get_gpio_base(); /* GPIO Set 1 */ if (gpio->set1.level) @@ -69,7 +85,7 @@ void setup_pch_gpios(const struct pch_gpio_map *gpio) int get_gpio(int gpio_num) { static const int gpio_reg_offsets[] = {0xc, 0x38, 0x48}; - u16 gpio_base = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; + u16 gpio_base = get_gpio_base(); int index, bit; if (gpio_num > MAX_GPIO_NUMBER) |