diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-02 20:19:15 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-14 07:07:04 +0000 |
| commit | d9f1b04ec5f87c05da60c5da84df35624ecd0fac (patch) | |
| tree | 877718f211e7540f2899bfd3f537481c43cdd363 /src/southbridge/intel/lynxpoint/early_pch.c | |
| parent | 78c615c332859e1d59924214100b6da506131d48 (diff) | |
sb/intel/lynxpoint: Do not determine PCH type at runtime
Both PCH types are very different, and mixing the code for both together
isn't useful. First of all, inline `pch_is_lp` to return a constant.
This allows the compiler to optimize out unused code, which results in
smaller executables. For the Asrock B85M Pro4, it's about 2.5 KiB less.
Subsequent commits will further split the southbridge code.
Change-Id: Iba904acf64096478d1b76ffd05a076f0203502f8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45047
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_pch.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_pch.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 85f9f33a97..956d1d24de 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -35,11 +35,6 @@ enum pch_platform_type get_pch_platform_type(void) return PCH_TYPE_DESKTOP; } -int pch_is_lp(void) -{ - return get_pch_platform_type() == PCH_TYPE_ULT; -} - static void pch_enable_bars(void) { pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1); |