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author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-24 11:18:15 -0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-09 21:40:23 +0000 |
commit | 665d870244a26e28e445ac8e6945ddf986d9050a (patch) | |
tree | 07cea0977cce4d6b17ac607ab174c9211666618c /src/southbridge/intel/lynxpoint/chip.h | |
parent | ca520a726a6d47c31c5a8c278e2a272b1f89bac4 (diff) |
soc/intel/xeon_sp: rework lock_pam0123() to accomodate hidden SAD device
For Intel SPR-SP, the SAD device is hidden, so pcidev_path_on_bus()
returns NULL. Therefore use pci_s_write_config32() instead.
Move lock_pam0123() from finalize.c to util.c, to be together with
unlock_pam_regions().
Change-Id: Ib08d423d8c4d482612077b66dab3878018da8f2b
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/chip.h')
0 files changed, 0 insertions, 0 deletions