diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-25 14:03:40 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-28 08:52:37 +0000 |
| commit | 9f78127b61632cbb138bdbfa650c2e9965440d3b (patch) | |
| tree | b0f146a3725bcd86b83242b9abb465bd27829681 /src/southbridge/intel/lynxpoint/chip.h | |
| parent | 172bcc835f0d214444398c57a0ca9eddd2941ecf (diff) | |
lynxpoint: Factor out PIRQ routing from devicetree
All boards disable PIRQs. They aren't used on modern OSes anyway.
Change-Id: I1351fd4a3910e8cf2e9afe51dc2e82c7464de403
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/chip.h')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/chip.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/src/southbridge/intel/lynxpoint/chip.h b/src/southbridge/intel/lynxpoint/chip.h index ed362a2d65..cba7671ecc 100644 --- a/src/southbridge/intel/lynxpoint/chip.h +++ b/src/southbridge/intel/lynxpoint/chip.h @@ -7,19 +7,6 @@ struct southbridge_intel_lynxpoint_config { /** - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - - /** * GPI Routing configuration for LynxPoint-H * * Only the lower two bits have a meaning: |