summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/bootblock.c
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2017-05-03 10:05:27 -0700
committerDuncan Laurie <dlaurie@chromium.org>2017-05-04 01:57:36 +0200
commitfff2e6c5561889aaf0dec3b8c94f642aec8701ed (patch)
treea39c7c5b6ce0e9e06d196104e563bdc84925c7e8 /src/southbridge/intel/lynxpoint/bootblock.c
parentdcc4d431517b7bb4008bd1aea376183d61507bb3 (diff)
intel/skylake: nhlt: Add 48Khz 2ch 16bit config for max98927
This changelist adds the 48Khz 2ch 16bit NHLT configuration for the Maxim 98927 speaker amplifier codec. BUG=b:35585307 TEST=manual testing to ensure speaker output is functional on Eve board Change-Id: Ieda988b557ecefdace5f81b474a952af56e69315 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/19548 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/bootblock.c')
0 files changed, 0 insertions, 0 deletions