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authorDuncan Laurie <dlaurie@chromium.org>2012-12-17 11:31:40 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-14 18:25:10 +0100
commit74c0d05cf51e089357712b2c855f344caba680fb (patch)
tree81ff5169a3b42ea32207ec783485508e1174f7ac /src/southbridge/intel/lynxpoint/azalia.c
parent045f153a4fe2b6e1cb193db01866218d0316f253 (diff)
lynxpoint: Update device IDs and clock gating setup
- Add device IDs for lynxpoint mobile and LP variants. - Update the clock gating setup based on BWG - Update the SATA programming based on BWG - Add a DEVSLP0 mux config register Change-Id: Icf4d7bab7f3df7adef5eb7c5e310a6995227a0e5 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2649 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/azalia.c')
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index 7b51671d7e..ac2b79d15f 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -282,7 +282,7 @@ static void azalia_init(struct device *dev)
pci_write_config32(dev, 0xc4, reg32);
reg8 = pci_read_config8(dev, 0x43);
- reg8 |= (1 << 6);
+ reg8 |= (1 << 5) | (1 << 6) | (1 << 2) | (1 << 1) | (1 << 0);
pci_write_config8(dev, 0x43, reg8);
/* Additional programming steps */