haswell/lynxpoint: Align cosmetics with Broadwell

Tested with BUILD_TIMELESS=1, Google Wolf does not change.

Change-Id: Ibd8430352e860ffc0e2030fd7bc73582982f4695
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45698
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 35 insertions, 37 deletions

diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 16c4b75f96..ee2d8000bc 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -2,9 +2,10 @@
 
 /* Global Variables */
 
-Name(\PICM, 0)		// IOAPIC/8259
+Name (\PICM, 0)		// IOAPIC/8259
 
-/* Global ACPI memory region. This region is used for passing information
+/*
+ * Global ACPI memory region. This region is used for passing information
  * between coreboot (aka "the system bios"), ACPI, and the SMI handler.
  * Since we don't know where this will end up in memory at ACPI compile time,
  * we have to fix it up in coreboot's ACPI creation phase.
@@ -31,9 +32,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
 	PWRS,	 8,	// 0x10 - Power State (AC = 1)
 	/* Thermal policy */
 	Offset (0x11),
-	TLVL,    8,	// 0x11 - Throttle Level Limit
+	TLVL,	 8,	// 0x11 - Throttle Level Limit
 	FLVL,	 8,	// 0x12 - Current FAN Level
-	TCRT,    8,	// 0x13 - Critical Threshold
+	TCRT,	 8,	// 0x13 - Critical Threshold
 	TPSV,	 8,	// 0x14 - Passive Threshold
 	TMAX,	 8,	// 0x15 - CPU Tj_max
 	F0OF,	 8,	// 0x16 - FAN 0 OFF Threshold
@@ -51,7 +52,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
 	F4OF,	 8,	// 0x22 - FAN 4 OFF Threshold
 	F4ON,	 8,	// 0x23 - FAN 4 ON Threshold
 	F4PW,	 8,	// 0x24 - FAN 4 PWM value
-	TMPS,    8,	// 0x25 - Temperature Sensor ID
+	TMPS,	 8,	// 0x25 - Temperature Sensor ID
 	/* Processor Identification */
 	Offset (0x28),
 	APIC,	 8,	// 0x28 - APIC Enabled by coreboot
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
index 1e9de3cb33..bc1d73cddf 100644
--- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
@@ -4,7 +4,7 @@
 
 Device (LPCB)
 {
-	Name(_ADR, 0x001f0000)
+	Name (_ADR, 0x001f0000)
 
 	OperationRegion(LPC0, PCI_Config, 0x00, 0x100)
 	Field (LPC0, AnyAcc, NoLock, Preserve)
@@ -14,7 +14,7 @@ Device (LPCB)
 		Offset (0x40),
 		PMBS,	16,	// PMBASE
 		Offset (0x48),
-		GPBS,   16,	// GPIOBASE
+		GPBS,	16,	// GPIOBASE
 		Offset (0x60),	// Interrupt Routing Registers
 		PRTA,	8,
 		PRTB,	8,
@@ -40,10 +40,10 @@ Device (LPCB)
 
 	#include "acpi/ec.asl"
 
-	Device (DMAC)		// DMA Controller
+	Device (DMAC)	// DMA Controller
 	{
-		Name(_HID, EISAID("PNP0200"))
-		Name(_CRS, ResourceTemplate()
+		Name (_HID, EISAID("PNP0200"))
+		Name (_CRS, ResourceTemplate()
 		{
 			IO (Decode16, 0x00, 0x00, 0x01, 0x20)
 			IO (Decode16, 0x81, 0x81, 0x01, 0x11)
@@ -53,7 +53,7 @@ Device (LPCB)
 		})
 	}
 
-	Device (FWH)		// Firmware Hub
+	Device (FWH)	// Firmware Hub
 	{
 		Name (_HID, EISAID("INT0800"))
 		Name (_CRS, ResourceTemplate()
@@ -67,7 +67,7 @@ Device (LPCB)
 		Name (_HID, EISAID("PNP0103"))
 		Name (_CID, 0x010CD041)
 
-		Name(BUF0, ResourceTemplate()
+		Name (BUF0, ResourceTemplate()
 		{
 			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
@@ -90,7 +90,7 @@ Device (LPCB)
 		Method (_CRS, 0, Serialized) // Current resources
 		{
 			If (HPTE) {
-				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
+				CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
 					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
@@ -110,8 +110,8 @@ Device (LPCB)
 
 	Device(PIC)	// 8259 Interrupt Controller
 	{
-		Name(_HID,EISAID("PNP0000"))
-		Name(_CRS, ResourceTemplate()
+		Name (_HID,EISAID("PNP0000"))
+		Name (_CRS, ResourceTemplate()
 		{
 			IO (Decode16, 0x20, 0x20, 0x01, 0x02)
 			IO (Decode16, 0x24, 0x24, 0x01, 0x02)
@@ -160,8 +160,7 @@ Device (LPCB)
 			IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post
 			IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved
 			IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI
-			IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE,
-			    0x1, 0xff)
+			IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0xff)
 
 			// GPIO region may be 128 bytes or 4096 bytes
 			IO (Decode16, 0x0000, 0x0000, 0x1, 0x00, GPR1)
@@ -197,9 +196,8 @@ Device (LPCB)
 
 	Device (TIMR)	// Intel 8254 timer
 	{
-		Name(_HID, EISAID("PNP0100"))
-		Name(_CRS, ResourceTemplate()
-		{
+		Name (_HID, EISAID("PNP0100"))
+		Name (_CRS, ResourceTemplate() {
 			IO (Decode16, 0x40, 0x40, 0x01, 0x04)
 			IO (Decode16, 0x50, 0x50, 0x10, 0x04)
 			IRQNoFlags() {0}
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl
index 6d0428c464..bace058387 100644
--- a/src/southbridge/intel/lynxpoint/acpi/pch.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Intel Cougar Point PCH support */
+/* Intel Lynx Point PCH support */
 
-Scope(\)
+Scope (\)
 {
 	// Return TRUE if chipset is LynxPoint-LP
 	Method (ISLP, 0, NotSerialized)
@@ -11,17 +11,16 @@ Scope(\)
 	}
 
 	// IO-Trap at 0x800. This is the ACPI->SMI communication interface.
-
-	OperationRegion(IO_T, SystemIO, 0x800, 0x10)
-	Field(IO_T, ByteAcc, NoLock, Preserve)
+	OperationRegion (IO_T, SystemIO, 0x800, 0x10)
+	Field (IO_T, ByteAcc, NoLock, Preserve)
 	{
-		Offset(0x8),
+		Offset (0x8),
 		TRP0, 8		// IO-Trap at 0x808
 	}
 
-	// ICH7 Root Complex Register Block. Memory Mapped through RCBA)
-	OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000)
-	Field(RCRB, DWordAcc, Lock, Preserve)
+	// Root Complex Register Block
+	OperationRegion (RCRB, SystemMemory, DEFAULT_RCBA, 0x4000)
+	Field (RCRB, DWordAcc, Lock, Preserve)
 	{
 		Offset(0x3404), // High Performance Timer Configuration
 		HPAS, 2,	// Address Select
diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
index ce3a869a92..8956563cd9 100644
--- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
@@ -116,7 +116,7 @@ Device (SDMA)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
 	})
 
 	Method (_CRS, 0, NotSerialized)
@@ -156,7 +156,7 @@ Device (I2C0)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
 	})
 
 	// DMA channels are only used if Serial IO DMA controller is enabled
@@ -236,7 +236,7 @@ Device (I2C1)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
 	})
 
 	// DMA channels are only used if Serial IO DMA controller is enabled
@@ -313,7 +313,7 @@ Device (SPI0)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
 	})
 
 	Method (_CRS, 0, NotSerialized)
@@ -350,7 +350,7 @@ Device (SPI1)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
 	})
 
 	// DMA channels are only used if Serial IO DMA controller is enabled
@@ -399,7 +399,7 @@ Device (UAR0)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13}
 	})
 
 	// DMA channels are only used if Serial IO DMA controller is enabled
@@ -448,7 +448,7 @@ Device (UAR1)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13}
 	})
 
 	Method (_CRS, 0, NotSerialized)
@@ -485,7 +485,7 @@ Device (SDIO)
 	Name (RBUF, ResourceTemplate ()
 	{
 		Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)
-		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {5}
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {5}
 	})
 
 	Method (_CRS, 0, NotSerialized)