diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-06 23:22:11 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-16 17:13:18 +0000 |
| commit | 9c8c858e687e03e19773ea84fea021301de0e933 (patch) | |
| tree | 824d5907840413a56e5152bc9b54b75eab30970d /src/southbridge/intel/lynxpoint/Makefile.inc | |
| parent | 70c618547632924a4eae15023f14ab22469a26e0 (diff) | |
sb/intel/lynxpoint: Add native thermal init
Implement native thermal initialisation for Lynx Point. This is only
needed when MRC.bin is not used.
Change-Id: I4a67a3092d0c2e56bfdacb513a899ef838193cbd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64180
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index 14bba2e1b0..5874c4f1de 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -35,7 +35,7 @@ bootblock-y += early_pch.c romstage-y += early_usb.c early_me.c me_status.c early_pch.c romstage-y += pmutil.c -romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c +romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c thermal.c ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y) romstage-y += lp_gpio.c |