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authorMartin Roth <gaumless@gmail.com>2015-06-20 16:17:12 -0600
committerMartin Roth <gaumless@gmail.com>2015-06-23 22:48:45 +0200
commit59aa2b191b5b510e6a0567f6d2be5d1b97195c95 (patch)
tree2efb596e30a342423b7f18ff4984dcc0e207511b /src/southbridge/intel/lynxpoint/Makefile.inc
parent6ab0fd0a9455d35dde5c359845d35bb337b7666e (diff)
southbridge/intel: Create common IFD Kconfig and Makefile
We've got a lot of duplicated code to set up the IFD/ME/TXE/GBE/ETC. This is the start of creating a common interface for all of them. This also allows us to reduce the chipset dependencies for CBFS_SIZE. Change-Id: Iff08f74305d5ce545b5863915359eeb91eab0208 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10613 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/Makefile.inc')
-rw-r--r--src/southbridge/intel/lynxpoint/Makefile.inc46
1 files changed, 1 insertions, 45 deletions
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index a22251afc0..a42fe3946f 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -19,10 +19,7 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y)
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-INTERMEDIATE:=lynxpoint_add_me
+subdirs-y += ../common/firmware
ramstage-y += pch.c
ramstage-y += azalia.c
@@ -66,45 +63,4 @@ ramstage-y += gpio.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += gpio.c
endif
-ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
-IFD_BIN_PATH := $(objgenerated)/ifdfake.bin
-IFD_SECTIONS := $(addprefix -b ,$(CONFIG_IFD_BIOS_SECTION:"%"=%)) \
- $(addprefix -m ,$(CONFIG_IFD_ME_SECTION:"%"=%)) \
- $(addprefix -g ,$(CONFIG_IFD_GBE_SECTION:"%"=%)) \
- $(addprefix -p ,$(CONFIG_IFD_PLATFORM_SECTION:"%"=%))
-else
-IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
-endif
-
-lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL) $(IFDFAKE)
-ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
- printf "\n** WARNING **\n"
- printf "Coreboot will be built with a fake Intel Firmware Descriptor (IFD).\n"
- printf "Never write a complete coreboot.rom with a fake IFD to your board's\n"
- printf "flash ROM! Make sure that you only write valid flash regions.\n\n"
- printf " IFDFAKE Building a fake Intel Firmware Descriptor\n"
- $(IFDFAKE) $(IFD_SECTIONS) $(IFD_BIN_PATH)
-endif
- printf " DD Adding Intel Firmware Descriptor\n"
- dd if=$(IFD_BIN_PATH) \
- of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
-ifeq ($(CONFIG_HAVE_ME_BIN),y)
- printf " IFDTOOL me.bin -> coreboot.pre\n"
- $(objutil)/ifdtool/ifdtool \
- -i ME:$(CONFIG_ME_BIN_PATH) \
- $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-endif
-ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
- printf " IFDTOOL Locking Management Engine\n"
- $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-else ifneq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
- printf " IFDTOOL Unlocking Management Engine\n"
- $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-endif
-
-PHONY += lynxpoint_add_me
-
endif