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authorAngel Pons <th3fanbus@gmail.com>2020-07-25 02:46:39 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-07-26 21:17:50 +0000
commit89739baf531e26dc81420df4f943bf8c163a0c0d (patch)
tree61b363d8d6681e93af4d65bf7f0fd0276fa4bc8c /src/southbridge/intel/ibexpeak
parent4d2db06ab5f52bd283673c08b40b3b87600d0674 (diff)
{sb,soc}/intel/**/*.c: Use macros for PCI COMMAND bits
We have definitions for the bits in the PCI COMMAND register. Use them. Also add spaces around bitwise operators, to comply with the code style. Change-Id: Icc9c06597b340fc63fa583dd935e42e61ad9fbe5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c4
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c3
2 files changed, 5 insertions, 2 deletions
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 7e99613a28..230d5eb29f 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -439,7 +439,9 @@ static void lpc_init(struct device *dev)
printk(BIOS_DEBUG, "pch: %s\n", __func__);
/* Set the value for PCI command register. */
- pci_write_config16(dev, PCI_COMMAND, 0x000f);
+ pci_write_config16(dev, PCI_COMMAND,
+ PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL |
+ PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
/* IO APIC initialization. */
pch_enable_ioapic(dev);
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 357ad5fc99..21371495eb 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -49,7 +49,8 @@ static void sata_init(struct device *dev)
/* SATA configuration */
/* Enable BARs */
- pci_write_config16(dev, PCI_COMMAND, 0x0007);
+ pci_write_config16(dev, PCI_COMMAND,
+ PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
if (sata_mode == 0) {
/* AHCI */