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| author | Chris Zhou <chris_zhou@compal.corp-partner.google.com> | 2018-05-14 19:07:43 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-18 12:16:20 +0000 |
| commit | 6e09b3bde954424162ceb7a739059f9b9f38a7aa (patch) | |
| tree | 87cd3fe41fcd521d9d0f4168f14d86d70ad48b81 /src/southbridge/intel/ibexpeak | |
| parent | a613ccd18bac2750af8583ec091aa26d8c6137fe (diff) | |
mb/google/poppy/variants/nami: Fix SoC I2C CLK is abnormal
The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to
470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than
400kHz.
BUG=b:78819970
TEST=The I2C CLKs are 5% lower than 400kHz.
Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26282
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
0 files changed, 0 insertions, 0 deletions