diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2017-07-03 21:43:18 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2017-07-06 08:49:37 +0000 |
| commit | 9858796a1b3f755ee9f63d9864fe48595022f4ed (patch) | |
| tree | 07b847c655011806ec4c5c44aff13de661406abf /src/southbridge/intel/ibexpeak | |
| parent | a0aea5669b2ee33f5db7abccf71ac6862e12c5c3 (diff) | |
sb/intel/ibexpeak: Add whitespace around '<<'
Change-Id: Ib3a69f45b48c19c61b12a992b23dad1693bf5f9e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smi.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smihandler.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c index 950dbe0e2a..961f3d5598 100644 --- a/src/southbridge/intel/ibexpeak/smi.c +++ b/src/southbridge/intel/ibexpeak/smi.c @@ -181,9 +181,9 @@ static u32 reset_tco_status(void) reg32 = inl(tcobase + 0x04); /* set status bits are cleared by writing 1 to them */ - outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS + outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS if (reg32 & (1 << 18)) - outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS + outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS return reg32; } diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index a0b963ea3d..af25c49ceb 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -215,9 +215,9 @@ static u32 reset_tco_status(void) reg32 = inl(tcobase + 0x04); /* set status bits are cleared by writing 1 to them */ - outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS + outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS if (reg32 & (1 << 18)) - outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS + outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS return reg32; } |