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authorMartin Roth <martinroth@google.com>2017-06-24 21:29:38 -0600
committerMartin Roth <martinroth@google.com>2017-07-16 19:22:18 +0000
commit7a1a3ad2ce3403f0379b72d30360e2bed02e9c26 (patch)
tree0db32f6a8f2349b5ce269996f3246b13fec9d5af /src/southbridge/intel/ibexpeak/pch.h
parent9fa8ebe1a41fab33badfa4745708e1ad237e8a34 (diff)
southbridge/intel: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2b532522938123bb7844cef94cda0b44bcb98e45 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/pch.h')
-rw-r--r--src/southbridge/intel/ibexpeak/pch.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index d87f8e0b47..63307d9368 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -70,7 +70,7 @@ int pch_silicon_type(void);
int pch_silicon_supported(int type, int rev);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
void gpi_route_interrupt(u8 gpi, u8 mode);
-#if CONFIG_ELOG
+#if IS_ENABLED(CONFIG_ELOG)
void pch_log_state(void);
#endif
#else /* __PRE_RAM__ */