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authorAngel Pons <th3fanbus@gmail.com>2020-10-17 18:39:04 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-10-20 11:52:16 +0000
commit77f340a707a868d56d8348cd9ab03308f4902bd9 (patch)
tree4906d0179f5f12309510cd184c6615a3f2d09073 /src/southbridge/intel/ibexpeak/pch.c
parente26e9b556deb86564b5f1cfe70e2095a03c964dc (diff)
sb/intel/ibexpeak: Align to coreboot's coding style
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical. Change-Id: I30512ef7ff7eb091e1f880c43a0a9ecf8625a710 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46530 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/pch.c')
-rw-r--r--src/southbridge/intel/ibexpeak/pch.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/ibexpeak/pch.c b/src/southbridge/intel/ibexpeak/pch.c
index 4d48eba10d..958d1db4af 100644
--- a/src/southbridge/intel/ibexpeak/pch.c
+++ b/src/southbridge/intel/ibexpeak/pch.c
@@ -68,7 +68,7 @@ void pch_enable(struct device *dev)
u16 reg16;
if (!dev->enabled) {
- printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev));
+ printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev));
/* Ensure memory, io, and bus master are all disabled */
reg16 = pci_read_config16(dev, PCI_COMMAND);