diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-13 13:40:39 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-18 12:17:49 +0000 |
| commit | be841404cc836aa0e4727f7cad7337cb38371e1d (patch) | |
| tree | dc72356786a9ef76cf0b20dc415f2aa94254e977 /src/southbridge/intel/ibexpeak/me.c | |
| parent | 77f7a6e3867307a4835c2d0013f73ada079d09d6 (diff) | |
sb/intel/ibexpeak: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: I7d9d0a205f9a650eb87bc8f90f2a28a5c4b2891c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26259
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/me.c')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/me.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index e260650e8f..92cba81305 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -115,7 +115,8 @@ static inline void mei_write_dword_ptr(void *ptr, int offset) } #ifndef __SMM__ -static inline void pci_read_dword_ptr(device_t dev, void *ptr, int offset) +static inline void pci_read_dword_ptr(struct device *dev,void *ptr, + int offset) { u32 dword = pci_read_config32(dev, offset); memcpy(ptr, &dword, sizeof(dword)); @@ -425,7 +426,7 @@ void intel_me_finalize_smm(void) #else /* !__SMM__ */ /* Determine the path that we should take based on ME status */ -static me_bios_path intel_me_path(device_t dev) +static me_bios_path intel_me_path(struct device *dev) { me_bios_path path = ME_DISABLE_BIOS_PATH; struct me_hfs hfs; @@ -492,7 +493,7 @@ static me_bios_path intel_me_path(device_t dev) } /* Prepare ME for MEI messages */ -static int intel_mei_setup(device_t dev) +static int intel_mei_setup(struct device *dev) { struct resource *res; struct mei_csr host; @@ -522,7 +523,7 @@ static int intel_mei_setup(device_t dev) } /* Read the Extend register hash of ME firmware */ -static int intel_me_extend_valid(device_t dev) +static int intel_me_extend_valid(struct device *dev) { struct me_heres status; u32 extend[8] = {0}; @@ -569,14 +570,14 @@ static int intel_me_extend_valid(device_t dev) } /* Hide the ME virtual PCI devices */ -static void intel_me_hide(device_t dev) +static void intel_me_hide(struct device *dev) { dev->enabled = 0; pch_enable(dev); } /* Check whether ME is present and do basic init */ -static void intel_me_init(device_t dev) +static void intel_me_init(struct device *dev) { me_bios_path path = intel_me_path(dev); @@ -611,7 +612,8 @@ static void intel_me_init(device_t dev) } } -static void set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void set_subsystem(struct device *dev, unsigned vendor, + unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |