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authorPatrick Rudolph <siro@das-labor.org>2017-04-12 16:50:26 +0200
committerMartin Roth <martinroth@google.com>2017-05-01 16:21:56 +0200
commitd0eb6cd8bd89ee47a8e3bf2948a2ff4196c761e3 (patch)
tree5f1de7b5a284833b07d659be198af5130b2934a3 /src/southbridge/intel/ibexpeak/lpc.c
parent0a4a4f7ae4188bccf4147196f08620453ef0633c (diff)
nb/intel/fsp_sandybridge/gma: Set up OpRegion in nb code
Set up IGD OpRegion in northbridge and fill in GNVS' aslb. At this point GNVS already has been set up by SSDT injection. Required for future VBT patches that will: * Use ACPI memory instead of CBMEM * Use common implementation to locate VBT * Fill in platform specific values Change-Id: Ie5d93117ee8bd8d15085aedbfa7358dfcf5f0045 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19307 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/lpc.c')
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