diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-02 00:21:01 +0200 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-06 10:13:21 +0000 |
commit | d0310faa3bc4d3b62d17d632fbaee98c146eebe0 (patch) | |
tree | 8d3a55eb4135484ae7729f8092876ba36c165a2e /src/southbridge/intel/ibexpeak/lpc.c | |
parent | f266dc61743cfce56ea026e66bc88cad8e5de2bb (diff) |
sb/intel/ibexpeak: Implement PCH function disable in chip_ops
This does the following:
- implement a PCH disable function that will be called by the PCI
drivers as part of their chip_ops
- removes the iobp_x calls as those don't exist on ibexpeak
- complete the devicetree with to be disabled PCI devices for the
chip_ops to be called
- Clean up some code copied from bd82x6x
Change-Id: I78d25ffe9af482c77d397a9fdb4f0127e40baddc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/lpc.c')
-rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 3e1f4a4350..ec9b045f24 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -409,11 +409,6 @@ static void enable_clock_gating(struct device *dev) reg16 |= (1 << 2) | (1 << 11); pci_write_config16(dev, GEN_PMCON_1, reg16); - pch_iobp_update(0xEB007F07, ~0UL, (1 << 31)); - pch_iobp_update(0xEB004000, ~0UL, (1 << 7)); - pch_iobp_update(0xEC007F07, ~0UL, (1 << 31)); - pch_iobp_update(0xEC004000, ~0UL, (1 << 7)); - reg32 = RCBA32(CG); reg32 |= (1 << 31); reg32 |= (1 << 29) | (1 << 28); @@ -500,13 +495,7 @@ static void lpc_init(struct device *dev) pch_power_options(dev); /* Initialize power management */ - switch (pch_silicon_type()) { - case PCH_TYPE_MOBILE5: - mobile5_pm_init (dev); - break; - default: - printk(BIOS_ERR, "Unknown Chipset: 0x%04x\n", dev->device); - } + mobile5_pm_init(dev); /* Set the state of the GPIO lines. */ //gpio_init(dev); |