nb/intel/nehalem: Move PCH init to sb/intel/ibexpeak

This change does the following:
- Move PCH init code from the common romstage to sb code, this allows
  for easier reuse in bootblock
- Provide a common minimal LPC io decode setup, mainboards can
  override this in the mainboard_lpc_init if required
- Set up LPC generic IO decode up in romstage based on devicetree
  settings
- Remove the ramstage LPC generic IO decode from ramstage as this is
  now done in romstage.c
- Get rid of unneeded setup of spi_read configuration in BIOS_CNTL as
  this is already done in the bootblock.

Change-Id: I3f448ad1fdc445c4c1fedbc8497e1025af111412
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35772
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 1 insertions, 19 deletions

diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index e433530bae..a457722ac8 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -465,18 +465,6 @@ static void pch_fixups(struct device *dev)
 	RCBA32_OR(0x21a8, 0x3);
 }
 
-static void pch_decode_init(struct device *dev)
-{
-	config_t *config = dev->chip_info;
-
-	printk(BIOS_DEBUG, "pch_decode_init\n");
-
-	pci_write_config32(dev, LPC_GEN1_DEC, config->gen1_dec);
-	pci_write_config32(dev, LPC_GEN2_DEC, config->gen2_dec);
-	pci_write_config32(dev, LPC_GEN3_DEC, config->gen3_dec);
-	pci_write_config32(dev, LPC_GEN4_DEC, config->gen4_dec);
-}
-
 static void lpc_init(struct device *dev)
 {
 	printk(BIOS_DEBUG, "pch: lpc_init\n");
@@ -587,12 +575,6 @@ static void pch_lpc_read_resources(struct device *dev)
 	}
 }
 
-static void pch_lpc_enable_resources(struct device *dev)
-{
-	pch_decode_init(dev);
-	return pci_dev_enable_resources(dev);
-}
-
 static void pch_lpc_enable(struct device *dev)
 {
 	/* Enable PCH Display Port */
@@ -794,7 +776,7 @@ static struct pci_operations pci_ops = {
 static struct device_operations device_ops = {
 	.read_resources		= pch_lpc_read_resources,
 	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= pch_lpc_enable_resources,
+	.enable_resources	= pci_dev_enable_resources,
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
 	.acpi_name		= lpc_acpi_name,