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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-13 00:13:50 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-13 00:27:07 +0200 |
commit | 3a09179f462ad3f6111c7b8ebbad7d78534f9234 (patch) | |
tree | b854e11a926e555a4ade85950846b8cdea0ce56b /src/southbridge/intel/ibexpeak/early_smbus.c | |
parent | 0210119b4b95e84f954cfd6dc11aafbc187421af (diff) |
Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"
This reverts commit 0210119b4b95e84f954cfd6dc11aafbc187421af
Change-Id: I5be3f2a54394c592650a0dcd671e4a72ae796cb2
Reviewed-on: http://review.coreboot.org/3443
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/early_smbus.c')
-rw-r--r-- | src/southbridge/intel/ibexpeak/early_smbus.c | 77 |
1 files changed, 0 insertions, 77 deletions
diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c deleted file mode 100644 index d8aff926cc..0000000000 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/console.h> -#include <device/pci_ids.h> -#include <device/pci_def.h> -#include "pch.h" -#include "smbus.h" - -void enable_smbus(void) -{ - device_t dev; - - /* Set the SMBus device statically. */ - dev = PCI_DEV(0x0, 0x1f, 0x3); - - /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) { - die("SMBus controller not found!"); - } - - /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO); - - /* Set SMBus enable. */ - pci_write_config8(dev, HOSTC, HST_EN); - - /* Set SMBus I/O space enable. */ - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - - /* Disable interrupt generation. */ - outb(0, SMBUS_IO_BASE + SMBHSTCTL); - - /* Clear any lingering errors, so transactions can run. */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - print_debug("SMBus controller enabled.\n"); -} - -int smbus_read_byte(unsigned device, unsigned address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} - -int smbus_write_byte(unsigned device, unsigned address, u8 data) -{ - return do_smbus_write_byte(SMBUS_IO_BASE, device, address, data); -} - -int smbus_block_read(unsigned device, unsigned cmd, u8 bytes, u8 *buf) -{ - return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); -} - -int smbus_block_write(unsigned device, unsigned cmd, u8 bytes, const u8 *buf) -{ - return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); -} - |