diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-28 09:58:21 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 06:20:53 +0000 |
| commit | 8b6dfdeb203c5e10c804398b822f85df2b4b6d26 (patch) | |
| tree | e9d67db357a2c50b7fa7633d2847afb20e4591c5 /src/southbridge/intel/ibexpeak/azalia.c | |
| parent | 7b2646536a773f181f766fe755403a242e9f3e8e (diff) | |
sb/intel/ibexpeak: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I212ef304a03d068232f50a71c318e2b468336339
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/azalia.c')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/azalia.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index eb75b1200d..c57bd9a4da 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -262,8 +262,7 @@ static void azalia_init(struct device *dev) pci_write_config32(dev, 0xd0, reg32); /* Set Bus Master */ - reg32 = pci_read_config32(dev, PCI_COMMAND); - pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); pci_write_config8(dev, 0x3c, 0x0a); // unused? |